1. Field of Art
This invention relates generally to adjustable impedance networks and more particularly, to an impedance trim circuit suitable for use in monolithic circuit applications for adjusting operating characteristic error signals of the circuit.
2. Description of the Prior Art
The need for a monolithic adjustable trim circuit for use in several integrated circuit applications has long been felt. Many integrated circuit structures have errors associated therewith caused by processing tolerance problems. For instance, most all monolithic differential amplifiers have input voltage offset errors caused primarily by mismatch in the differential transistors which comprise the amplifier. In the past, to eliminate these offset errors, discrete trimming potentiometers have been employed. Several disadvantages are associated with such discrete potentiometers. First, the physical size of such potentiometers may limit their use in some application. For each differential amplifier that is used in a system a respective potentiometer would be required that must be manually adjusted to trim the amplifier. As each monolithic differential amplifier employed in a system may require a trimming potentiometer the cost of such systems linearly increases accordingly. Thus, there is a need for an integrated adjustable impedance network which may be utilized in monolithic differential amplifier circuits to eliminate the voltage offset errors associated therewith. Additionally, there is a need for a relatively simple adjustable impedance network structure which may be employed in several integrated circuit applications.
At least two prior art teachings have recognized the above needs. For instance, in the application by John J. Price, supra, there is disclosed a trim circuit and method of trimming the same for eliminating voltage errors otherwise associated with a monolithic digital to analog circuit. U.S. Pat. No. 4,016,483, Rudin, teaches a trim scheme including impedance elements which requires the use of electrical energy for trimming the impedance value of the disclosed impedance network.
From above it is quite apparent that there is a further need for a simple and inexpensive adjustable integrated impedance network that is suitable for use in several different integrated circuit applications.